1. Field of the Invention
This invention relates to oversampled analog-to-digital converters and, more particularly, to a technique for doubling the effective operating rate of an oversampled modulator to realize an increase in performance either in the form of an increase in resolution or an increase in conversion rate, without any reduction in resolution of oversampled analog-to-digital converters. The principles of the invention are generally applicable to any oversampled network, including second- and third-order oversampled modulators.
2. General Description of the Prior Art
High resolution analog-to-digital signal conversion can be achieved with lower resolution components through the use of an oversampled interpolative (or sigma delta) modulator followed by a digital low pass decimation filter. Oversampling constitutes operation of the modulator at a rate many times above the signal Nyquist rate, whereas decimation constitutes reduction of the clock rate down to the Nyquist rate.
Sigma delta modulators (sometimes referred to as delta sigma modulators) have been used in analog-to-digital (A/D) converters for some time. Detailed general information can be obtained from the following technical articles which are hereby incorporated by reference.
(1) "A Use of Limit Cycle Oscillators to Obtain Robust Analog to Digital Converters", J. C. Candy, IEEE Transactions on Communications, Vol. COM-22, No. 3, pp. 298-305, March 1974 PA0 (2) "Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator", J. C. Candy et al., IEEE Transactions on Communications, Vol. COM-24, No. 11, pp. 1268-1275, November 1976 PA0 (3) "A Use of Double Integration in Sigma Delta Modulator", J. C. Candy, IEEE Transactions on Communication, Vol. COM-33, No. 3, pp. 249-258, March 1985
Oversampled analog-to-digital converters perform a coarse quantization of their input signal at a sampling rate that is much higher than the Nyquist rate. Using a combination of feedback and integration, the resulting quantization noise is forced to high frequency so that its removal can be effected by low pass filtering and decimation. Enhanced resolution is obtained after these operations, but only at the expense of a reduction in throughput from the initial conversion rate. This type of converter offers the flexibility of allowing a tradeoff between resolution in time and resolution in amplitude. As an example, it is possible to achieve 16-bit conversions starting with only a 1-bit quantizer.
The ratio of the initial to final conversion rates, referred to as the oversampling ratio, governs the increase in resolution that is obtained for a given design of oversampled analog-to-digital converter (ADC). For a second-order modulator design, for instance, resolution improves by 2.5 bits for each doubling of the oversampling ratio, and increases to 3.5 bits for a third-order modulator. It would be desirable to operate with as high an oversampling ratio as possible; however, for a specified final conversion rate, circuit speed will impose a limitation on any given technology. A method that doubles the sampling ratio without increasing the circuit speed requirements would be useful in offering either improved resolution, e.g., 3.5 bits for a third-order modulator, or a doubling of the conversion rate without any reduction in resolution for higher frequency applications.